ROD Injector motherboard
Introduction
This page contains information about the ROD injector VME motherboard used to simulate the Hadronic Calorimeter (TILECAL) front end electronics for testing the Read-out system that is being developed at IFIC-Valencia. The idea is to use the same hardware as in the FEB (Interface Link) but without the need of complete drawers which digitizers, PMTs, etc. The tilecal interface link can thus be reprogrammed with a new firmware and a data pattern sent (for testing ROD inputs) when a trigger signal (L1A) arrives. This simple card holds two Interface Links, provide them with a voltage supply of 3,3v, and receive the L1A and L1_reset in different logic standards (LVTTL, LVDS, ECL and NIM are considered for enabling compatibility with different high energy physics standard NIM and VME modules).
The operating manual is available in pdf format.
Interface Link firmware source code for data generation
Several options are foreseen for programming the Interface Link's FPGA:
• Send the same raw data event (taken from testbeam) stored in an internal “virtual ROM” inside the FPGA when a L1A signal arrives. This allows us to apply online algorithms.
• Send an event with Tile's FEB format (section 4.1 ) but with counter data as the raw data contents. This allows us to detect when some event fragment has not been readout in the right sequence.
• Send raw data with the FEB data format, but using random energy values generated and convolutioned with the shaper wave form function  to calibrate our online reconstruction algorithms. This allows us to simulate random FEB data. A draft document describing such application is in progress.
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