Update on module results (22th August, 2000)

Transparencies presented for the Forward Hybrid Review (12th July, 2000)

• 4 Hamamatsu Detectors, within specs. No sparks seen up to 350V.
• KaptonIII Forward Hybrid (K3-161) populated with 12 ABCD2T.
• SEQUENCER - DRAFT readout.
• Support Card 97.
• Hybrid - Support Card Adapter.

• No optical readout is used, we use the old electrical lines.
• The hybrid has no token-data connection between chip5 and chip8. So, the readout is done independently for the 2 links.
• AGND and DGND are connected with 3 bonds on each chip.

• Vdd = 4.00V.
• Vcc = 3.50V.
• Edge detection circuitry disabled.
• Compression mode Level (X1X).
• Bias Current = 220uA.
• Shaper Current = 31.2uA.

Due to the lack of time, the trimming and timing (strobe delay setting) used were the same as the ones obtained with no detectors (hybrid results). The module results were obtained with Compression Mode Level and the Edge Detection Circuitry disabled to be less sensitive to the timing.

• Chip E13 does not respond properly, under investigation.
• Chip S9 has a bad calibration line (cal3), known from hybrid measurements.
• An effect from one plane to the other has been observed (see below).

Stability:

S-curves from Noise Scan don't show any sign of instability (example)

Response Curves:

• Response curves. Top plane.
• Response curves. Bottom plane.

Strange behaviour at low input charge (strobe pickup at low charge?, better timing?).

Gain:

• Gain channel by channel. Top plane.

  Chip	M0	S1	S2	S3	S4	E5
  Gain(mV/fC)	62.3	68.2	58.2	56.4	54.7	59.5

• Gain channel by channel. Bottom plane.

  Chip	M8	S9*	S10	S11	S12	E13
  Gain(mV/fC)	61.9	59.1	64.7	64.4	57.0	--

Noise (at Qin=2fC):

• Noise channel by channel. Top plane.

  Chip	M0	S1	S2	S3	S4	E5
  Noise(e-)	1618	1837	1737	1748	1761	1759

• Noise channel by channel. Bottom plane.

  Chip	M8	S9*	S10	S11	S12	E13
  Noise(e-)	1720	1751	1591	1594	1776	--

We have observed an inefficiency on one side depending on how the other side is configured. As an example we show some channel s-curves for Qin=3fC. Two s-curves per channel are shown, the green one (good one) is obtained powering-up the 12 chips at once and the configuring as master/slave each chip on both sides. The threhold scan is done in both sides but only one is readout. Link0 in the example case. The red s-curve (the inefficient one) is obtained powering-up the 12 chips, but only configuring the chips on the side been readout. Link0 in the example case. The other side remains only powered-up. The master on that side is sending the clock divided by two.